Video random-access memories (VRAMs) have recently found widespread use in microprocessor-based computers providing video graphics signals. These VRAMs are commonly incorporated into a video card which is coupled to the central processing unit (CPU) which is located on the motherboard of the computer. Such a video card is described in co-pending application Ser. No. 07/027,847, filed Mar. 19, 1987, entitled "Video Apparatus Employing VRAMs", which is assigned to the assignee of the present invention.
For bit-mapped graphics applications, each atomic position in the graphical display is called a "pixel", and each pixel itself has a unique address. Pixel data can be any length ranging from one to any finite number of bits. The addressing space in bit-mapped graphics is referred to as row and column indexes. A typical CRT display is a 640.times.400 pixel array, with a black and white pixel being represented as 1-bit, and a color pixel as a plurality of bits. According to this method the individual memory locations are referenced by their VRAM position in the addressing space.
A video card is conventionally plugged into one of a plurality of board slots located within the computer's cabinet. These slots are usually coupled to the CPU along some type of 32-bit bus. In the preferred embodiment, the video card is coupled to the computer's CPU along a "NUBUS" bus ("NUBUS" is a trademark of Texas Instruments, Inc.). The video card, as mentioned, engages one of the slots in the computer and communicates with the NUBUS. The output of the video card comprises a video signal which may include red, green and blue (RGB) color information. This video signal is then coupled to a video monitor for display thereon.
Conventionally, RGB color information is stored as 3 consecutive bytes (one byte for each color element) for a total of 24 bits. This presents a problem since the bus connecting the CPU to the video card is typically 4 bytes, i.e., 32-bits, wide. For instance, data transfer across the NUBUS commonly occurs in four byte transfers. This means that whenever 24-bit (3 byte) RGB graphics data is transferred across the NUBUS one byte is wasted. In other words, one byte of the NUBUS always remains unused or vacant during transfer of a 24-bit RGB quantity.
In the past, data transferred across the NUBUS was typically loaded directly into VRAM in a one-to-one correspondence scheme. That is, each word of data at a given NUBUS address was written to the corresponding video memory location in the same format (i.e., NUBUS format). Unfortunately, this scheme results in an inefficient use of video memory space since one byte out of every four bytes that is transferred always remains unused. What is needed then is a more efficient way of packing 24-bit RGB data in video memory which eliminates data vacancies.
As will be seen, the present invention provides a novel way of taking 24-bit RGB data that is presented on the NUBUS and packing it into video memory in a more efficient manner which eliminates data vacancies. It does this by compressing and rearranging the RGB data presented on the NUBUS, and by translating the NUBUS addresses to video memory addresses using a specialized algorithm.